
spidev_test2:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004005d0 <_init>:
  4005d0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4005d4:	910003fd 	mov	x29, sp
  4005d8:	94000044 	bl	4006e8 <call_weak_fn>
  4005dc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4005e0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004005f0 <.plt>:
  4005f0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4005f4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf2e4>
  4005f8:	f947fe11 	ldr	x17, [x16, #4088]
  4005fc:	913fe210 	add	x16, x16, #0xff8
  400600:	d61f0220 	br	x17
  400604:	d503201f 	nop
  400608:	d503201f 	nop
  40060c:	d503201f 	nop

0000000000400610 <perror@plt>:
  400610:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400614:	f9400211 	ldr	x17, [x16]
  400618:	91000210 	add	x16, x16, #0x0
  40061c:	d61f0220 	br	x17

0000000000400620 <open@plt>:
  400620:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400624:	f9400611 	ldr	x17, [x16, #8]
  400628:	91002210 	add	x16, x16, #0x8
  40062c:	d61f0220 	br	x17

0000000000400630 <__libc_start_main@plt>:
  400630:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400634:	f9400a11 	ldr	x17, [x16, #16]
  400638:	91004210 	add	x16, x16, #0x10
  40063c:	d61f0220 	br	x17

0000000000400640 <close@plt>:
  400640:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400644:	f9400e11 	ldr	x17, [x16, #24]
  400648:	91006210 	add	x16, x16, #0x18
  40064c:	d61f0220 	br	x17

0000000000400650 <__gmon_start__@plt>:
  400650:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400654:	f9401211 	ldr	x17, [x16, #32]
  400658:	91008210 	add	x16, x16, #0x20
  40065c:	d61f0220 	br	x17

0000000000400660 <abort@plt>:
  400660:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400664:	f9401611 	ldr	x17, [x16, #40]
  400668:	9100a210 	add	x16, x16, #0x28
  40066c:	d61f0220 	br	x17

0000000000400670 <puts@plt>:
  400670:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400674:	f9401a11 	ldr	x17, [x16, #48]
  400678:	9100c210 	add	x16, x16, #0x30
  40067c:	d61f0220 	br	x17

0000000000400680 <printf@plt>:
  400680:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400684:	f9401e11 	ldr	x17, [x16, #56]
  400688:	9100e210 	add	x16, x16, #0x38
  40068c:	d61f0220 	br	x17

0000000000400690 <ioctl@plt>:
  400690:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400694:	f9402211 	ldr	x17, [x16, #64]
  400698:	91010210 	add	x16, x16, #0x40
  40069c:	d61f0220 	br	x17

Disassembly of section .text:

00000000004006a0 <_start>:
  4006a0:	d280001d 	mov	x29, #0x0                   	// #0
  4006a4:	d280001e 	mov	x30, #0x0                   	// #0
  4006a8:	aa0003e5 	mov	x5, x0
  4006ac:	f94003e1 	ldr	x1, [sp]
  4006b0:	910023e2 	add	x2, sp, #0x8
  4006b4:	910003e6 	mov	x6, sp
  4006b8:	580000c0 	ldr	x0, 4006d0 <_start+0x30>
  4006bc:	580000e3 	ldr	x3, 4006d8 <_start+0x38>
  4006c0:	58000104 	ldr	x4, 4006e0 <_start+0x40>
  4006c4:	97ffffdb 	bl	400630 <__libc_start_main@plt>
  4006c8:	97ffffe6 	bl	400660 <abort@plt>
  4006cc:	00000000 	.inst	0x00000000 ; undefined
  4006d0:	00400924 	.word	0x00400924
  4006d4:	00000000 	.word	0x00000000
  4006d8:	00400b48 	.word	0x00400b48
  4006dc:	00000000 	.word	0x00000000
  4006e0:	00400bc8 	.word	0x00400bc8
  4006e4:	00000000 	.word	0x00000000

00000000004006e8 <call_weak_fn>:
  4006e8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf2e4>
  4006ec:	f947f000 	ldr	x0, [x0, #4064]
  4006f0:	b4000040 	cbz	x0, 4006f8 <call_weak_fn+0x10>
  4006f4:	17ffffd7 	b	400650 <__gmon_start__@plt>
  4006f8:	d65f03c0 	ret
  4006fc:	00000000 	.inst	0x00000000 ; undefined

0000000000400700 <deregister_tm_clones>:
  400700:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400704:	9101a000 	add	x0, x0, #0x68
  400708:	b0000081 	adrp	x1, 411000 <perror@GLIBC_2.17>
  40070c:	9101a021 	add	x1, x1, #0x68
  400710:	eb00003f 	cmp	x1, x0
  400714:	540000a0 	b.eq	400728 <deregister_tm_clones+0x28>  // b.none
  400718:	90000001 	adrp	x1, 400000 <_init-0x5d0>
  40071c:	f945f421 	ldr	x1, [x1, #3048]
  400720:	b4000041 	cbz	x1, 400728 <deregister_tm_clones+0x28>
  400724:	d61f0020 	br	x1
  400728:	d65f03c0 	ret
  40072c:	d503201f 	nop

0000000000400730 <register_tm_clones>:
  400730:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400734:	9101a000 	add	x0, x0, #0x68
  400738:	b0000081 	adrp	x1, 411000 <perror@GLIBC_2.17>
  40073c:	9101a021 	add	x1, x1, #0x68
  400740:	cb000021 	sub	x1, x1, x0
  400744:	9343fc21 	asr	x1, x1, #3
  400748:	8b41fc21 	add	x1, x1, x1, lsr #63
  40074c:	9341fc21 	asr	x1, x1, #1
  400750:	b40000a1 	cbz	x1, 400764 <register_tm_clones+0x34>
  400754:	90000002 	adrp	x2, 400000 <_init-0x5d0>
  400758:	f945f842 	ldr	x2, [x2, #3056]
  40075c:	b4000042 	cbz	x2, 400764 <register_tm_clones+0x34>
  400760:	d61f0040 	br	x2
  400764:	d65f03c0 	ret

0000000000400768 <__do_global_dtors_aux>:
  400768:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40076c:	910003fd 	mov	x29, sp
  400770:	f9000bf3 	str	x19, [sp, #16]
  400774:	b0000093 	adrp	x19, 411000 <perror@GLIBC_2.17>
  400778:	3941a260 	ldrb	w0, [x19, #104]
  40077c:	35000080 	cbnz	w0, 40078c <__do_global_dtors_aux+0x24>
  400780:	97ffffe0 	bl	400700 <deregister_tm_clones>
  400784:	52800020 	mov	w0, #0x1                   	// #1
  400788:	3901a260 	strb	w0, [x19, #104]
  40078c:	f9400bf3 	ldr	x19, [sp, #16]
  400790:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400794:	d65f03c0 	ret

0000000000400798 <frame_dummy>:
  400798:	17ffffe6 	b	400730 <register_tm_clones>

000000000040079c <pabort>:
  40079c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4007a0:	910003fd 	mov	x29, sp
  4007a4:	f9000fa0 	str	x0, [x29, #24]
  4007a8:	f9400fa0 	ldr	x0, [x29, #24]
  4007ac:	97ffff99 	bl	400610 <perror@plt>
  4007b0:	97ffffac 	bl	400660 <abort@plt>

00000000004007b4 <transfer>:
  4007b4:	a9b97bfd 	stp	x29, x30, [sp, #-112]!
  4007b8:	910003fd 	mov	x29, sp
  4007bc:	b9001fa0 	str	w0, [x29, #28]
  4007c0:	12800a80 	mov	w0, #0xffffffab            	// #-85
  4007c4:	3901a3a0 	strb	w0, [x29, #104]
  4007c8:	3901a7bf 	strb	wzr, [x29, #105]
  4007cc:	3901abbf 	strb	wzr, [x29, #106]
  4007d0:	3901afbf 	strb	wzr, [x29, #107]
  4007d4:	b90063bf 	str	wzr, [x29, #96]
  4007d8:	9101a3a0 	add	x0, x29, #0x68
  4007dc:	f90013a0 	str	x0, [x29, #32]
  4007e0:	910183a0 	add	x0, x29, #0x60
  4007e4:	f90017a0 	str	x0, [x29, #40]
  4007e8:	52800080 	mov	w0, #0x4                   	// #4
  4007ec:	b90033a0 	str	w0, [x29, #48]
  4007f0:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4007f4:	91019000 	add	x0, x0, #0x64
  4007f8:	b9400000 	ldr	w0, [x0]
  4007fc:	b90037a0 	str	w0, [x29, #52]
  400800:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400804:	91018000 	add	x0, x0, #0x60
  400808:	39400000 	ldrb	w0, [x0]
  40080c:	3900eba0 	strb	w0, [x29, #58]
  400810:	790073bf 	strh	wzr, [x29, #56]
  400814:	3900efbf 	strb	wzr, [x29, #59]
  400818:	9101a3a0 	add	x0, x29, #0x68
  40081c:	f90023a0 	str	x0, [x29, #64]
  400820:	910183a0 	add	x0, x29, #0x60
  400824:	f90027a0 	str	x0, [x29, #72]
  400828:	52800080 	mov	w0, #0x4                   	// #4
  40082c:	b90053a0 	str	w0, [x29, #80]
  400830:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400834:	91019000 	add	x0, x0, #0x64
  400838:	b9400000 	ldr	w0, [x0]
  40083c:	b90057a0 	str	w0, [x29, #84]
  400840:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400844:	91018000 	add	x0, x0, #0x60
  400848:	39400000 	ldrb	w0, [x0]
  40084c:	39016ba0 	strb	w0, [x29, #90]
  400850:	7900b3bf 	strh	wzr, [x29, #88]
  400854:	39016fbf 	strb	wzr, [x29, #91]
  400858:	910083a0 	add	x0, x29, #0x20
  40085c:	aa0003e2 	mov	x2, x0
  400860:	d28d6001 	mov	x1, #0x6b00                	// #27392
  400864:	f2a80801 	movk	x1, #0x4040, lsl #16
  400868:	b9401fa0 	ldr	w0, [x29, #28]
  40086c:	97ffff89 	bl	400690 <ioctl@plt>
  400870:	b9006fa0 	str	w0, [x29, #108]
  400874:	b9406fa0 	ldr	w0, [x29, #108]
  400878:	7100001f 	cmp	w0, #0x0
  40087c:	5400008c 	b.gt	40088c <transfer+0xd8>
  400880:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400884:	91302000 	add	x0, x0, #0xc08
  400888:	97ffffc5 	bl	40079c <pabort>
  40088c:	b9006fbf 	str	wzr, [x29, #108]
  400890:	1400001c 	b	400900 <transfer+0x14c>
  400894:	b9406fa2 	ldr	w2, [x29, #108]
  400898:	52955560 	mov	w0, #0xaaab                	// #43691
  40089c:	72a55540 	movk	w0, #0x2aaa, lsl #16
  4008a0:	9b207c40 	smull	x0, w2, w0
  4008a4:	d360fc01 	lsr	x1, x0, #32
  4008a8:	131f7c40 	asr	w0, w2, #31
  4008ac:	4b000021 	sub	w1, w1, w0
  4008b0:	2a0103e0 	mov	w0, w1
  4008b4:	531f7800 	lsl	w0, w0, #1
  4008b8:	0b010000 	add	w0, w0, w1
  4008bc:	531f7800 	lsl	w0, w0, #1
  4008c0:	4b000041 	sub	w1, w2, w0
  4008c4:	7100003f 	cmp	w1, #0x0
  4008c8:	54000081 	b.ne	4008d8 <transfer+0x124>  // b.any
  4008cc:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  4008d0:	91308000 	add	x0, x0, #0xc20
  4008d4:	97ffff67 	bl	400670 <puts@plt>
  4008d8:	b9806fa0 	ldrsw	x0, [x29, #108]
  4008dc:	910183a1 	add	x1, x29, #0x60
  4008e0:	38606820 	ldrb	w0, [x1, x0]
  4008e4:	2a0003e1 	mov	w1, w0
  4008e8:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  4008ec:	9130a000 	add	x0, x0, #0xc28
  4008f0:	97ffff64 	bl	400680 <printf@plt>
  4008f4:	b9406fa0 	ldr	w0, [x29, #108]
  4008f8:	11000400 	add	w0, w0, #0x1
  4008fc:	b9006fa0 	str	w0, [x29, #108]
  400900:	b9406fa0 	ldr	w0, [x29, #108]
  400904:	71000c1f 	cmp	w0, #0x3
  400908:	54fffc69 	b.ls	400894 <transfer+0xe0>  // b.plast
  40090c:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400910:	91308000 	add	x0, x0, #0xc20
  400914:	97ffff57 	bl	400670 <puts@plt>
  400918:	d503201f 	nop
  40091c:	a8c77bfd 	ldp	x29, x30, [sp], #112
  400920:	d65f03c0 	ret

0000000000400924 <main>:
  400924:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400928:	910003fd 	mov	x29, sp
  40092c:	b9001fbf 	str	wzr, [x29, #28]
  400930:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400934:	91016000 	add	x0, x0, #0x58
  400938:	f9400000 	ldr	x0, [x0]
  40093c:	52800041 	mov	w1, #0x2                   	// #2
  400940:	97ffff38 	bl	400620 <open@plt>
  400944:	b9001ba0 	str	w0, [x29, #24]
  400948:	b9401ba0 	ldr	w0, [x29, #24]
  40094c:	7100001f 	cmp	w0, #0x0
  400950:	5400008a 	b.ge	400960 <main+0x3c>  // b.tcont
  400954:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400958:	9130c000 	add	x0, x0, #0xc30
  40095c:	97ffff90 	bl	40079c <pabort>
  400960:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400964:	9101a400 	add	x0, x0, #0x69
  400968:	aa0003e2 	mov	x2, x0
  40096c:	d28d6021 	mov	x1, #0x6b01                	// #27393
  400970:	f2a80021 	movk	x1, #0x4001, lsl #16
  400974:	b9401ba0 	ldr	w0, [x29, #24]
  400978:	97ffff46 	bl	400690 <ioctl@plt>
  40097c:	b9001fa0 	str	w0, [x29, #28]
  400980:	b9401fa0 	ldr	w0, [x29, #28]
  400984:	3100041f 	cmn	w0, #0x1
  400988:	54000081 	b.ne	400998 <main+0x74>  // b.any
  40098c:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400990:	91312000 	add	x0, x0, #0xc48
  400994:	97ffff82 	bl	40079c <pabort>
  400998:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  40099c:	9101a400 	add	x0, x0, #0x69
  4009a0:	aa0003e2 	mov	x2, x0
  4009a4:	d28d6021 	mov	x1, #0x6b01                	// #27393
  4009a8:	f2b00021 	movk	x1, #0x8001, lsl #16
  4009ac:	b9401ba0 	ldr	w0, [x29, #24]
  4009b0:	97ffff38 	bl	400690 <ioctl@plt>
  4009b4:	b9001fa0 	str	w0, [x29, #28]
  4009b8:	b9401fa0 	ldr	w0, [x29, #28]
  4009bc:	3100041f 	cmn	w0, #0x1
  4009c0:	54000081 	b.ne	4009d0 <main+0xac>  // b.any
  4009c4:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  4009c8:	91318000 	add	x0, x0, #0xc60
  4009cc:	97ffff74 	bl	40079c <pabort>
  4009d0:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4009d4:	91018000 	add	x0, x0, #0x60
  4009d8:	aa0003e2 	mov	x2, x0
  4009dc:	d28d6061 	mov	x1, #0x6b03                	// #27395
  4009e0:	f2a80021 	movk	x1, #0x4001, lsl #16
  4009e4:	b9401ba0 	ldr	w0, [x29, #24]
  4009e8:	97ffff2a 	bl	400690 <ioctl@plt>
  4009ec:	b9001fa0 	str	w0, [x29, #28]
  4009f0:	b9401fa0 	ldr	w0, [x29, #28]
  4009f4:	3100041f 	cmn	w0, #0x1
  4009f8:	54000081 	b.ne	400a08 <main+0xe4>  // b.any
  4009fc:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400a00:	9131e000 	add	x0, x0, #0xc78
  400a04:	97ffff66 	bl	40079c <pabort>
  400a08:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400a0c:	91018000 	add	x0, x0, #0x60
  400a10:	aa0003e2 	mov	x2, x0
  400a14:	d28d6061 	mov	x1, #0x6b03                	// #27395
  400a18:	f2b00021 	movk	x1, #0x8001, lsl #16
  400a1c:	b9401ba0 	ldr	w0, [x29, #24]
  400a20:	97ffff1c 	bl	400690 <ioctl@plt>
  400a24:	b9001fa0 	str	w0, [x29, #28]
  400a28:	b9401fa0 	ldr	w0, [x29, #28]
  400a2c:	3100041f 	cmn	w0, #0x1
  400a30:	54000081 	b.ne	400a40 <main+0x11c>  // b.any
  400a34:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400a38:	91324000 	add	x0, x0, #0xc90
  400a3c:	97ffff58 	bl	40079c <pabort>
  400a40:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400a44:	91019000 	add	x0, x0, #0x64
  400a48:	aa0003e2 	mov	x2, x0
  400a4c:	d28d6081 	mov	x1, #0x6b04                	// #27396
  400a50:	f2a80081 	movk	x1, #0x4004, lsl #16
  400a54:	b9401ba0 	ldr	w0, [x29, #24]
  400a58:	97ffff0e 	bl	400690 <ioctl@plt>
  400a5c:	b9001fa0 	str	w0, [x29, #28]
  400a60:	b9401fa0 	ldr	w0, [x29, #28]
  400a64:	3100041f 	cmn	w0, #0x1
  400a68:	54000081 	b.ne	400a78 <main+0x154>  // b.any
  400a6c:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400a70:	9132a000 	add	x0, x0, #0xca8
  400a74:	97ffff4a 	bl	40079c <pabort>
  400a78:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400a7c:	91019000 	add	x0, x0, #0x64
  400a80:	aa0003e2 	mov	x2, x0
  400a84:	d28d6081 	mov	x1, #0x6b04                	// #27396
  400a88:	f2b00081 	movk	x1, #0x8004, lsl #16
  400a8c:	b9401ba0 	ldr	w0, [x29, #24]
  400a90:	97ffff00 	bl	400690 <ioctl@plt>
  400a94:	b9001fa0 	str	w0, [x29, #28]
  400a98:	b9401fa0 	ldr	w0, [x29, #28]
  400a9c:	3100041f 	cmn	w0, #0x1
  400aa0:	54000081 	b.ne	400ab0 <main+0x18c>  // b.any
  400aa4:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400aa8:	91330000 	add	x0, x0, #0xcc0
  400aac:	97ffff3c 	bl	40079c <pabort>
  400ab0:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400ab4:	9101a400 	add	x0, x0, #0x69
  400ab8:	39400000 	ldrb	w0, [x0]
  400abc:	2a0003e1 	mov	w1, w0
  400ac0:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400ac4:	91336000 	add	x0, x0, #0xcd8
  400ac8:	97fffeee 	bl	400680 <printf@plt>
  400acc:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400ad0:	91018000 	add	x0, x0, #0x60
  400ad4:	39400000 	ldrb	w0, [x0]
  400ad8:	2a0003e1 	mov	w1, w0
  400adc:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400ae0:	9133a000 	add	x0, x0, #0xce8
  400ae4:	97fffee7 	bl	400680 <printf@plt>
  400ae8:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400aec:	91019000 	add	x0, x0, #0x64
  400af0:	b9400003 	ldr	w3, [x0]
  400af4:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400af8:	91019000 	add	x0, x0, #0x64
  400afc:	b9400001 	ldr	w1, [x0]
  400b00:	5289ba60 	mov	w0, #0x4dd3                	// #19923
  400b04:	72a20c40 	movk	w0, #0x1062, lsl #16
  400b08:	9ba07c20 	umull	x0, w1, w0
  400b0c:	d360fc00 	lsr	x0, x0, #32
  400b10:	53067c01 	lsr	w1, w0, #6
  400b14:	90000000 	adrp	x0, 400000 <_init-0x5d0>
  400b18:	91340000 	add	x0, x0, #0xd00
  400b1c:	2a0103e2 	mov	w2, w1
  400b20:	2a0303e1 	mov	w1, w3
  400b24:	97fffed7 	bl	400680 <printf@plt>
  400b28:	b9401ba0 	ldr	w0, [x29, #24]
  400b2c:	97ffff22 	bl	4007b4 <transfer>
  400b30:	b9401ba0 	ldr	w0, [x29, #24]
  400b34:	97fffec3 	bl	400640 <close@plt>
  400b38:	b9401fa0 	ldr	w0, [x29, #28]
  400b3c:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400b40:	d65f03c0 	ret
  400b44:	00000000 	.inst	0x00000000 ; undefined

0000000000400b48 <__libc_csu_init>:
  400b48:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400b4c:	910003fd 	mov	x29, sp
  400b50:	a901d7f4 	stp	x20, x21, [sp, #24]
  400b54:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf2e4>
  400b58:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf2e4>
  400b5c:	91374294 	add	x20, x20, #0xdd0
  400b60:	913722b5 	add	x21, x21, #0xdc8
  400b64:	a902dff6 	stp	x22, x23, [sp, #40]
  400b68:	cb150294 	sub	x20, x20, x21
  400b6c:	f9001ff8 	str	x24, [sp, #56]
  400b70:	2a0003f6 	mov	w22, w0
  400b74:	aa0103f7 	mov	x23, x1
  400b78:	9343fe94 	asr	x20, x20, #3
  400b7c:	aa0203f8 	mov	x24, x2
  400b80:	97fffe94 	bl	4005d0 <_init>
  400b84:	b4000194 	cbz	x20, 400bb4 <__libc_csu_init+0x6c>
  400b88:	f9000bb3 	str	x19, [x29, #16]
  400b8c:	d2800013 	mov	x19, #0x0                   	// #0
  400b90:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400b94:	aa1803e2 	mov	x2, x24
  400b98:	aa1703e1 	mov	x1, x23
  400b9c:	2a1603e0 	mov	w0, w22
  400ba0:	91000673 	add	x19, x19, #0x1
  400ba4:	d63f0060 	blr	x3
  400ba8:	eb13029f 	cmp	x20, x19
  400bac:	54ffff21 	b.ne	400b90 <__libc_csu_init+0x48>  // b.any
  400bb0:	f9400bb3 	ldr	x19, [x29, #16]
  400bb4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400bb8:	a942dff6 	ldp	x22, x23, [sp, #40]
  400bbc:	f9401ff8 	ldr	x24, [sp, #56]
  400bc0:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400bc4:	d65f03c0 	ret

0000000000400bc8 <__libc_csu_fini>:
  400bc8:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400bcc <_fini>:
  400bcc:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400bd0:	910003fd 	mov	x29, sp
  400bd4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400bd8:	d65f03c0 	ret
